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Hardware Preparation
.
0
4
1
PCI_DLL (OFF)
PCI_ARBITER (ON)
FLASH BOOT
3
2
1
PCI_DLL (ON)
PCI_ARBITER (OFF)
EEPROM BOOT
SW2
Factory Set
Figure 2-5. SW2 Description
2.2.5
Setting MODCKH(0:3) for PLL Multiplication Factors
Because the PCI mode in the PowerQUICC II (Hip4 and Hip7) is enabled, the
MODCKH(0:3) lines are taken from SW5(#1 - #4) and the MODCKH(0:3) bits in the hard-
reset configuration word are ignored. SW5(#1 - #4) set the upper 4 bits of the MODCK field
during hard reset configuration acquisition. When an individual switch of SW4 # 1 - #4 is
at the OFF position, its corresponding MODCKH line is pulled-high (‘1’) during hard reset,
while when at the ON position, pulled-down (‘0’) (see Figure 2-3).
2.2.6
Setting PCI_ARBITER for PCI Mode-Enabled
The settings of this line determine the operation of the PCI arbiter (when the PowerQUICC
II is in PCI mode). When PCI_ARBITER is set low, the PCI arbiter in the PowerQUICC II
is enabled. When set high, the PCI arbiter is disabled and an external arbiter can be used.
When switch SW6 # 2 is at the OFF position, its corresponding PCI_ARBITER line is
pulled-high (‘1’ - disabled), while when at the ON position, pulled-down (‘0’ - enabled)
(see Figure 2-5).
2.2.7
Setting PCI_DLL for PCI Mode-Enabled
The settings of this line determine the operation of the DLL for PCI mode-enabled. When
PCI mode is enabled, the DLL must be enabled. When PCI_DLL is set low, the DLL is
disabled. When set high, the DLL is enabled. When switch SW6 # 3 is at the OFF position,
its corresponding PCI_DLL line is pulled-high (‘1’ - enabled). When at the ON position,
pulled-down (‘0’ - disabled) (see Figure 2-5).
MPC8272ADS User Guide
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